Hexagon 780: A Whole new IP for AI & DSP

Every year Qualcomm likes to talk about its new Hexagon DSPs, with the last few generations also adding to the table new Tensor Accelerators dedicated for ML inferencing. This year’s Snapdragon 888 design also hypes up the new Hexagon 780 design, with the difference being that this time around the generational improvements are truly humongous.

The new Hexagon 780 accelerator IP truly deserves a large increment in its IP numbering scheme, as it’s essentially a ground-up redesign of the company’s existing DSP with scalar and vector execution engines, and the recent Tensor Accelerators. Previously all these execution engines were acting as discrete independent blocks within the Hexagon 600 series family, but that’s now changed in the new IP design.

The new IP block fuses together all the scalar, tensor, and vector capabilities into a single monolithic IP, vastly increasing the performance and power efficiency of workloads that make a use of all the mixed capabilities of the design.

In terms of performance uplifts, scalar execution capabilities are said to be increased by 50%, while tensor execution throughput has doubled. The vector extension units seem to have remained the same this generation, but actual performance of workloads will still have been increased thanks to the new memory architecture of the new IP block.

Qualcomm states that they’ve increased the on-chip SRAM dedicated to the block 16-fold, allowing for larger machine-learning inference models to fit within the block’s memory, greatly accelerating their performance. This larger memory pool also allows for coherency between the scalar, vector and tensor units, allowing for the vastly increased workload handoff time between the different execution engines. I asked about the actual size of this new memory, but the company wouldn’t disclose any further details, just stating that it’s significant.

The company’s engineers were extremely hyped up about the new design, stating that the performance and flexibility of the new design is well beyond that of what other companies can achieve through disaggregated DSP and ML inference engines, sometimes even from different IP vendors.

The most important figure for the new design is the 3x performance per watt claim, which is just a massive generational improvement that you rarely see in the industry.

As is usual for Qualcomm, the company doesn’t actually state the per-block performance increases, but instead opts to showcase an aggregate computational throughput figure shared amongst all of the SoC’s IP blocks, including CPU, GPU, and the new Hexagon accelerator block. This new figure lands in at 26TOPs for the Snapdragon 888, which is 73% higher than the 15TOPs figure of the Snapdragon 865. Given that we’ve seen significant changes in all IP blocks this generation, I won’t attempt a breakdown estimate as it’s likely going to be wrong and off-the-mark anyhow.

The Adreno 660 - A 35% faster GPU

Amongst the improvements which lead up to that 26TOPs figure is a new vastly improved GPU in the form of the new Adreno 660.

Qualcomm still holds architectural details of their GPUs very close to their chest and thus doesn’t go disclose very much about the new GPU design and what has actually changed, but one thing they did talk about is the addition of new mixed-precision dot product as well as FP16/FP32 wave matrix-multiply instructions, which allow the new GPU to increase AI performance by up to 43%.

We’re also seeing the addition of variable rate shading (VRS) onto the Adreno GPU architecture, allowing for coarser pixel shading onto larger pixel blocks for object and screen areas which don’t require as much detail or the native resolution shading wouldn’t be noticeable. This is also a major feature that’s being introduced in the console and new-generation PC graphics cards and GPUs, which should bring greater performance uplift for new gaming titles which take advantage of the new features. It’s great to see Qualcomm bringing this to the mobile space along with the rest of the industry.

For graphics workloads, the new GPU is advertised as being able to increase performance by up to 35%, which is a very major generational performance leap.

Such a performance jump would actually signify that Qualcomm may very well regain the gaming performance crown this generation, having lost it to Apple’s SoCs over the last two generations. Apple’s latest A14 has seen rather conservative gains on the GPU side this year, so a 35% performance gain over the Snapdragon 865 should very much allow the new Snapdragon 888 to retake the leadership position.

A 35% performance increase with a 20% power efficiency increase would indicate that the new SoC would achieve the higher performance at cost of a little higher power consumption, but given the Snapdragon 865’s excellent power characteristics of below 4W, Qualcomm does have a little leeway to increase power this generation.

3200MHz LPDDR5

The new Snapdragon 888 moves from a hybrid memory controller to one that focuses on LPDDR5, and also increases the frequency support for new LPDDR5 to 3200MHz (Or LPDDR5-6400).

For the Snapdragon 865 Qualcomm was rather unenthusiastic about the LPDDR5 switch, saying that it didn’t bring all to great improvements to performance or power efficiency – something which we actually did test out and come to the same conclusion in our review of the two OnePlus 8 phones, where the LPDDR4X variant ended up being no slower and seemingly actually more efficient to us. Apple this year also kept on using LPDDR4X on their A14 and M1 SoCs – pointing out that the benefits aren’t all that great.

For the Snadpragon 888 however, Qualcomm’s engineers seemed more upbeat about LPDDR5 and the new SoC actually being able to utilise the increase memory bandwidth this generation. Without going into details, the company also stated that they’ve improved the overall design of the memory subsystem, improving aspects such as latency.

On the part of the memory subsystem, Qualcomm still employs a 3MB system-level-cache in front of the memory controllers, with the ability of all SoC IP blocks to take advantage of this cache.

The Snapdragon 888: Back to monolithic SoC on 5nm Triple ISPs: Concurrent Triple-Camera Usage
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  • name99 - Wednesday, December 2, 2020 - link

    From the outside, the problem appears to be that ARM is too deferential to its customers (one of the things that nV could fix if they get control...)
    In particular (compare with Apple) ARM appears unwilling to just do something new and aggressive and hope that it will be picked up when it's ready.

    This might seem reasonable, but the problem is that your main customers are companies like Samsung and Qualcomm, the gang that couldn't shoot straight. Both (still!) seem utterly unaware that Moore's law is still a thing, and that the needs of devices evolve with time. So they both insist their priorities are smallest cheapest cores possible -- until there's a mad scramble to match whatever Apple is doing.

    This foolishness has been most obvious with the A55. Sure, maybe in some technical sense the A55 is good enough wrt performance and energy and did not need to be updated for those reasons. BUT refusing to update it locks the ISA at v8.2.
    (Does anyone know how this is handled given that in theory the A78 supports some v8.3 instructions? Is the rule just that you don't use those instructions on a dynamiq A78+A55 system?)

    So QC and SS are stuck. Because n years ago they were too stupid to see the big picture, that future small cores would need to track the evolving ARM ISA, they've held back what their large cores can do. A more dynamic ARM should probably just have ignored whatever they said and switched to a model like Apple that updates the large and small cores in lockstep every year.
  • GeoffreyA - Thursday, December 3, 2020 - link

    The magic is simple: Icestorm is quite likely an out-of-order design, which picks up the performance quite a bit. And as for the extra power that comes along with out of order, they probably got it right down with enough optimisation/clever design (physical register files, micro-op cache, etc). Reminds me a bit of the comparison between Atom and Bobcat/Jaguar. For my part, I feel that in-order designs aren't really worth the supposed power savings (except in some cases), so I don't know why these companies waste their time.
  • GeoffreyA - Thursday, December 3, 2020 - link

    Replying to brucethemoose.
  • eastcoast_pete - Friday, December 4, 2020 - link

    Does anyone here know for sure whether Apple's efficiency cores are indeed out-of-order designs? That might actually help explain the better performance and performance/Wh of their Ice Storm cores; and raise the question: why hasn't ARM updated its little core design? I guess one answer is because they didn't have to (yet).
  • Lolimaster - Thursday, December 10, 2020 - link

    Considering A77 is more efficient and powerful at the same frequency than the A55 which is really old. Increase it a bit in size with big update and extra budget and you the Apple "lpA76" cores.
  • tuxRoller - Thursday, December 3, 2020 - link

    The answer is... the old big cores are replaced by the new X series and become the new little (or mid) core.
  • yeeeeman - Wednesday, December 2, 2020 - link

    can't wait for battery life tests, although i suspect they will be a bit worse than tsmc 7nm.
  • iphonebestgamephone - Thursday, December 3, 2020 - link

    Why did they bother with 5nm then? Is this 5nm even cheaper than tsmc 7?
  • SyukriLajin - Thursday, December 3, 2020 - link

    because apple have been marketing 5nm, and they can't sell "the best [android] soc in the market" with 7nm, especially when their android competitors are also moving to 5nm. the efficiency difference might be small, but marketing impact is big enough to ignore. plus most phones running this chip in 2021 probably have 4000mAh+ batteries in it anyway, wouldn't make any impact in consumer products.
  • iphonebestgamephone - Thursday, December 10, 2020 - link

    Do the general public care more about nm or antutu? Or is it that oems would be more likely to get the 5nm one?

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