Samsung HBM2E ‘Flashbolt’ Memory for GPUs: 16 GB Per Stack, 3.2 Gbpsby Anton Shilov on March 20, 2019 11:00 AM EST
Samsung has introduced the industry’s first memory that correspond to the HBM2E specification. The company’s new Flashbolt memory stacks increase performance by 33% and offer double per-die as well as double per-package capacity. Samsung introduced its HBM2E DRAMs at GTC, a fitting location since NVIDIA is one of the biggest HBM2 consumers due to their popular GV100 processor.
Samsung’s Flashbolt KGSDs (known good stacked die) are based on eight 16-Gb memory dies interconnected using TSVs (through silicon vias) in an 8-Hi stack configuration. Every Flashbolt package features a 1024-bit bus with a 3.2 Gbps data transfer speed per pin, thus offering up to 410 GB/s of bandwidth per KGSD.
Samsung positions its Flashbolt KGSDs for next-gen datacenter, HPC, AI/ML, and graphics applications. By using four Flashbolt stacks with a processor featuring a 4096-bit memory interface, developers can get 64 GB of memory with a 1.64 TB/s peak bandwidth, something that will be a great advantage for capacity and bandwidth-hungry chips. With two KGSDs they get 32 GB of DRAM with an 820 GB/s peak bandwidth.
|Samsung's HBM2 Memory Comparison
|Bandwidth Per Pin
|Number of DRAM ICs per Stack
|DRAM IC Process Technology
|Effective Bus Width
|Bandwidth per Stack
To increase DRAM transfer speed per pin to 3.2 Gbps, Samsung probably had to employ various methods to reduce collateral clock interference between the 5000+ TSVs and ensure clean signals, yet the company does not discuss this in its current announcement. Last year the company did disclose some of the tricks used by its Aquabolt HBM2 DRAMs to increase bandwidth per pin to 2.4 Gbps, so most of these methods have probably evolved in case of the Flashbolt.
In fact, Samsung’s announcement does not state that that the company has started mass production of its Flashbolt HBM2E memory, so it looks like the company has finished development of the technology, but is not yet ready to start shipments of such chips in mass quantities.
- JEDEC Updates HBM Spec to Boost Capacity & Performance: 24 GB, 307 GB/s Per Stack
- Samsung Starts Production of HBM2 “Aquabolt” Memory: 8 GB, 2.4 Gbps
- JEDEC Publishes HBM2 Specification as Samsung Begins Mass Production of Chips
- SK Hynix Adds HBM2 to Catalog: 4 GB Stacks Set to Be Available in Q3