Intel Iris Pro 5200 Graphics Review: Core i7-4950HQ Testedby Anand Lal Shimpi on June 1, 2013 10:01 AM EST
Addressing the Memory Bandwidth Problem
Integrated graphics solutions always bumped into a glass ceiling because they lacked the high-speed memory interfaces of their discrete counterparts. As Haswell is predominantly a mobile focused architecture, designed to span the gamut from 10W to 84W TDPs, relying on a power-hungry high-speed external memory interface wasn’t going to cut it. Intel’s solution to the problem, like most of Intel’s solutions, involves custom silicon. As a owner of several bleeding edge foundries, would you expect anything less?
As we’ve been talking about for a while now, the highest end Haswell graphics configuration includes 128MB of eDRAM on-package. The eDRAM itself is a custom design by Intel and it’s built on a variant of Intel’s P1271 22nm SoC process (not P1270, the CPU process). Intel needed a set of low leakage 22nm transistors rather than the ability to drive very high frequencies which is why it’s using the mobile SoC 22nm process variant here.
Despite its name, the eDRAM silicon is actually separate from the main microprocessor die - it’s simply housed on the same package. Intel’s reasoning here is obvious. By making Crystalwell (the codename for the eDRAM silicon) a discrete die, it’s easier to respond to changes in demand. If Crystalwell demand is lower than expected, Intel still has a lot of quad-core GT3 Haswell die that it can sell and vice versa.
Unlike previous eDRAM implementations in game consoles, Crystalwell is true 4th level cache in the memory hierarchy. It acts as a victim buffer to the L3 cache, meaning anything evicted from L3 cache immediately goes into the L4 cache. Both CPU and GPU requests are cached. The cache can dynamically allocate its partitioning between CPU and GPU use. If you don’t use the GPU at all (e.g. discrete GPU installed), Crystalwell will still work on caching CPU requests. That’s right, Haswell CPUs equipped with Crystalwell effectively have a 128MB L4 cache.
Intel isn’t providing much detail on the connection to Crystalwell other than to say that it’s a narrow, double-pumped serial interface capable of delivering 50GB/s bi-directional bandwidth (100GB/s aggregate). Access latency after a miss in the L3 cache is 30 - 32ns, nicely in between an L3 and main memory access.
The eDRAM clock tops out at 1.6GHz.
There’s only a single size of eDRAM offered this generation: 128MB. Since it’s a cache and not a buffer (and a giant one at that), Intel found that hit rate rarely dropped below 95%. It turns out that for current workloads, Intel didn’t see much benefit beyond a 32MB eDRAM however it wanted the design to be future proof. Intel doubled the size to deal with any increases in game complexity, and doubled it again just to be sure. I believe the exact wording Intel’s Tom Piazza used during his explanation of why 128MB was “go big or go home”. It’s very rare that we see Intel be so liberal with die area, which makes me think this 128MB design is going to stick around for a while.
The 32MB number is particularly interesting because it’s the same number Microsoft arrived at for the embedded SRAM on the Xbox One silicon. If you felt that I was hinting heavily at the Xbox One being ok if its eSRAM was indeed a cache, this is why. I’d also like to point out the difference in future proofing between the two designs.
The Crystalwell enabled graphics driver can choose to keep certain things out of the eDRAM. The frame buffer isn’t stored in eDRAM for example.
|Peak Theoretical Memory Bandwidth|
|Memory Interface||Memory Frequency||Peak Theoretical Bandwidth|
|Intel Iris Pro 5200||128-bit DDR3 + eDRAM||1600MHz + 1600MHz eDRAM||25.6GB/s + 50GB/s eDRAM (bidirectional)|
|NVIDIA GeForce GT 650M||128-bit GDDR5||5016MHz||80.3 GB/s|
|Intel HD 5100/4600/4000||128-bit DDR3||1600MHz||25.6GB/s|
|Apple A6X||128-bit LPDDR2||1066MHz||17.1 GB/s|
Intel claims that it would take a 100 - 130GB/s GDDR memory interface to deliver similar effective performance to Crystalwell since the latter is a cache. Accessing the same data (e.g. texture reads) over and over again is greatly benefitted by having a large L4 cache on package.
I get the impression that the plan might be to keep the eDRAM on a n-1 process going forward. When Intel moves to 14nm with Broadwell, it’s entirely possible that Crystalwell will remain at 22nm. Doing so would help Intel put older fabs to use, especially if there’s no need for a near term increase in eDRAM size. I asked about the potential to integrate eDRAM on-die, but was told that it’s far too early for that discussion. Given the size of the 128MB eDRAM on 22nm (~84mm^2), I can understand why. Intel did float an interesting idea by me though. In the future it could integrate 16 - 32MB of eDRAM on-die for specific use cases (e.g. storing the frame buffer).
Intel settled on eDRAM because of its high bandwidth and low power characteristics. According to Intel, Crystalwell’s bandwidth curve is very flat - far more workload independent than GDDR5. The power consumption also sounds very good. At idle, simply refreshing whatever data is stored within, the Crystalwell die will consume between 0.5W and 1W. Under load, operating at full bandwidth, the power usage is 3.5 - 4.5W. The idle figures might sound a bit high, but do keep in mind that since Crystalwell caches both CPU and GPU memory it’s entirely possible to shut off the main memory controller and operate completely on-package depending on the workload. At the same time, I suspect there’s room for future power improvements especially as Crystalwell (or a lower power derivative) heads towards ultra mobile silicon.
Crystalwell is tracked by Haswell’s PCU (Power Control Unit) just like the CPU cores, GPU, L3 cache, etc... Paying attention to thermals, workload and even eDRAM hit rate, the PCU can shift power budget between the CPU, GPU and eDRAM.
Crystalwell is only offered alongside quad-core GT3 Haswell. Unlike previous generations of Intel graphics, high-end socketed desktop parts do not get Crystalwell. Only mobile H-SKUs and desktop (BGA-only) R-SKUs have Crystalwell at this point. Given the potential use as a very large CPU cache, it’s a bit insane that Intel won’t even offer a single K-series SKU with Crystalwell on-board.
As for why lower end parts don’t get it, they simply don’t have high enough memory bandwidth demands - particularly in GT1/GT2 graphics configurations. According to Intel, once you get to about 18W then GT3e starts to make sense but you run into die size constraints there. An Ultrabook SKU with Crystalwell would make a ton of sense, but given where Ultrabooks are headed (price-wise) I’m not sure Intel could get any takers.
Post Your CommentPlease log in or sign up to comment.
View All Comments
virgult - Saturday, August 31, 2013 - linkNvidia Kepler plays Crysis 3 well but it sucks insanely hard at computing and rendering.
Eric S - Wednesday, July 3, 2013 - linkIt appears to do compute better then graphics (and ECC memory is a plus for compute). That is exactly what pros will be looking for. Apple doesn't cater to the gaming market with these machines even if they should play most games fine. A dedicated gaming machine would be built much different then this.
jasonelmore - Sunday, June 2, 2013 - linkThis, I dont know about anyone else, but i'm not dropping 2 grand or $2700 with upgrades on a 15 incher that does not have dedicated graphics.
Another problem i see is the 13" Retina only uses duals, and if they did use this quad with GT3e silicon, then the price of of the 13" will go up at least $150 since the i7's and i5's the 13" currently use, are sub $300 parts.
The only solution i see is Apple offering it as a build to order/max upgrade option, and even then they risk segmentation across the product line.
fteoath64 - Monday, June 3, 2013 - link"can't sell a $2000 laptop without a dedicated GFX". Absolutely true, especially when the GT3e is still a little slower than the 650M. So the 750M tweaked a few mhz higher will do nicely for the rMBP. The 13 incher will get a boost with the GT3e CPU. So a slight upgrade to lower power cpu maybe worthwhile to some. Improvement to 1080p eyesight camera would be a given for the new rMBP.
Eric S - Wednesday, July 3, 2013 - linkYou can drop discrete graphics when that $2000+ laptop is using builtin graphics with the same price premium and number of transistors of the discrete chip. I'm almost positive the discrete will go away. I have a feeling that Apple had a say in optimizations and stressed OpenCL performance. That is probably what they will highlight when they announce a new MacBook Pro.
xtc-604 - Saturday, June 8, 2013 - linkI really hope that Apple continues to treat the rMBP 15 as a flagship. Giving it iGPU only would be a deal breaker for many professionals. Atleast in haswell's current form. Until Intel can make an IGPU that atleast matches or exceeds performance at high resolutions, it is still a no go for me.
Eric S - Wednesday, July 3, 2013 - linkWhy is that a deal breaker? The Iris 5200 is better then a discrete chip for compute (OpenCL). If you are doing 3D rendering, video editing, photoshop, bioinformatics, etc. that is what you should care about. It also has ECC memory unlike a discrete chip so you know your output is correct. How fast it can texture triangles is less important. It still has plenty of power in that area for any pro app. This is not designed to be a gaming machine. Not sure why anyone would be surprised it may not be optimized for that.
Eric S - Monday, July 1, 2013 - linkYou never know, but I doubt it. They will have trouble with the ports on the side if they make it smaller. I think it is more likely the space saving will go to additional battery. They may be able to get similar battery life increases to the Air with the extra space.
mikeztm - Tuesday, June 4, 2013 - linkNotice that the 13" 2012 rMBP is a little thicker than the 15" version. Quad core in 13 inch may be planned at the very beginning.
axien86 - Saturday, June 1, 2013 - link
Look at the overheating issues that come with i5/i7 Razer notebooks and finding the same heating noticed in their Haswell notebook press event several days ago.
If Apple decides to use these Haswells which put out heat in a concentrated area and in very thin outlines, you are essentially computing over a mini-bake oven.