Synopsys
Synopsys has introduced the industry's first full-stack AI-powered suite of electronic design automation tools that covers all stages of chip design, from architecture to design and implementation to manufacturing. The Synopsys.ai suite promises to radically reduce development time, lower costs, improve yields, and enhance performance. The set of tools is set to be extremely useful for chips set to be made on leading-edge nodes, such as 5nm, 3nm, 2nm-class, and beyond. Chip Design Challenges As chips gain complexity and adopt newer process technologies, their design and manufacturing costs escalate to unprecedented levels. Designing a reasonably complex 7 nm chip costs about $300 million (including ~ 40% for software). In contrast, the design cost of an advanced 5 nm processor exceeds $540 million (including software), according to...
NVIDIA's cuLitho to Speed Up Computational Lithography for 2nm and Beyond
Production of chips using leading-edge process technologies requires more compute power than ever. To address requirements of 2nm nodes and beyond, NVIDIA is rolling out its cuLitho software library...
31 by Anton Shilov on 3/27/2023Hot Chips 2021 Keynote Live Blog: Designing Chips with AI, Synopsys
Welcome to Hot Chips! This is the annual conference all about the latest, greatest, and upcoming big silicon that gets us all excited. Stay tuned during Monday and Tuesday...
0 by Dr. Ian Cutress on 8/23/2021Using AI to Build Better Processors: Google Was Just the Start, Says Synopsys
In light of the rate of innovation, chip design teams have spent tens of thousands of hours honing their skills over the decades. But getting the best human-designed processor...
100 by Dr. Ian Cutress on 6/23/2021New Tools Simplify Development of 2.5D Multi-Die 7nm Designs at Samsung Foundry
Advanced packaging technologies simplify production and increase performance of highly-complex multi-die SoCs as the semiconductor industry is looking at chiplet approach as an alternative to large dies that take...
5 by Anton Shilov on 10/22/2019Synopsys Demonstrates CXL and CCIX 1.1 over PCIe 5.0: Next-Gen In Action
Synopsys, one of the leading developers of chip development tools and silicon IP, demonstrated its CXL over PCIe 5.0 as well as CCIX 1.1 over PCIe 5.0 solutions at...
5 by Anton Shilov on 10/11/2019New Tools & IP Accelerate Development of 5nm Arm ‘Hercules’ SoCs
Arm, Synopsys, and Samsung Foundry have developed a set of optimized tools and IP that will enable chip designers to build next-generation SoCs based on Arm’s Hercules processor cores...
9 by Anton Shilov on 10/10/2019Samsung’s 5nm EUV Technology Gets Closer: Tools by Cadence & Synopsys Certified
Samsung Foundry has certified full flow tools from Cadence and Synopsys for its 5LPE (5 nm low-power early) process technology that uses extreme ultraviolet lithography (EUV). Full flow design...
13 by Anton Shilov on 7/8/2019Synopsys to Accelerate Samsung’s 7nm Ramp with Yield Explorer Platform
Synopsys has announced an acceleration of development on its yield learning platform designed to speed up ramp up of chips made using Samsung Foundry’s 7LPP (7 nm low power...
16 by Anton Shilov on 7/4/2019USB 3.2 at 20 Gb/s Coming to High-End Desktops This Year
The USB 3.0 Promoters Group announced its USB 3.2 specification update that increases theoretical performance of a USB 3.2 interface over a Type-C cable to 20 Gbps back in...
62 by Anton Shilov on 2/26/2019GlobalFoundries and Synopsys Develop Automotive-Grade IP for 22FDX Process Tech
GloalFoundries and Synopsys announced this week that they have jointly developed a portfolio of automotive-gade IP solutions for GF’s 22FDX process technology. The various IP blocks are designed for...
4 by Anton Shilov on 2/22/2019